Signed-off-by: Stephen Long <stepl...@quicinc.com>
---
target/arm/crypto_helper.c | 36 +++++++++++++++++++++---------------
target/arm/sve.decode | 10 ++++++++++
target/arm/translate-sve.c | 20 ++++++++++++++++++++
3 files changed, 51 insertions(+), 15 deletions(-)
diff --git a/target/arm/crypto_helper.c b/target/arm/crypto_helper.c
index f800266727..ae2ea018af 100644
--- a/target/arm/crypto_helper.c
+++ b/target/arm/crypto_helper.c
@@ -14,6 +14,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "crypto/aes.h"
+#include "tcg/tcg-gvec-desc.h"
union CRYPTO_STATE {
uint8_t bytes[16];
@@ -54,7 +55,7 @@ void HELPER(crypto_aese)(void *vd, void *vm, uint32_t decrypt)
rd[1] = st.l[1];
}
-void HELPER(crypto_aesmc)(void *vd, void *vm, uint32_t decrypt)
+void HELPER(crypto_aesmc)(void *vd, void *vm, uint32_t desc)
{
static uint32_t const mc[][256] = { {
/* MixColumns lookup table */
@@ -190,23 +191,28 @@ void HELPER(crypto_aesmc)(void *vd, void *vm, uint32_t
decrypt)
0xbe805d9f, 0xb58d5491, 0xa89a4f83, 0xa397468d,
} };
- uint64_t *rd = vd;
- uint64_t *rm = vm;
- union CRYPTO_STATE st = { .l = { rm[0], rm[1] } };
- int i;
+ intptr_t i, opr_sz = simd_oprsz(desc);
+ intptr_t decrypt = simd_data(desc);
- assert(decrypt < 2);
+ for (i = 0; i < opr_sz; i += 16) {
+ uint64_t *rd = vd + i;
+ uint64_t *rm = vm + i;
+ union CRYPTO_STATE st = { .l = { rm[0], rm[1] } };
+ int i;
- for (i = 0; i < 16; i += 4) {
- CR_ST_WORD(st, i >> 2) =
- mc[decrypt][CR_ST_BYTE(st, i)] ^
- rol32(mc[decrypt][CR_ST_BYTE(st, i + 1)], 8) ^
- rol32(mc[decrypt][CR_ST_BYTE(st, i + 2)], 16) ^
- rol32(mc[decrypt][CR_ST_BYTE(st, i + 3)], 24);
- }
+ assert(decrypt < 2);
- rd[0] = st.l[0];
- rd[1] = st.l[1];
+ for (i = 0; i < 16; i += 4) {
+ CR_ST_WORD(st, i >> 2) =
+ mc[decrypt][CR_ST_BYTE(st, i)] ^
+ rol32(mc[decrypt][CR_ST_BYTE(st, i + 1)], 8) ^
+ rol32(mc[decrypt][CR_ST_BYTE(st, i + 2)], 16) ^
+ rol32(mc[decrypt][CR_ST_BYTE(st, i + 3)], 24);
+ }
+
+ rd[0] = st.l[0];
+ rd[1] = st.l[1];
+ }
}
/*
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index de3768c24a..f58eb04d11 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -92,6 +92,10 @@
# Named instruction formats. These are generally used to
# reduce the amount of duplication between instruction patterns.
+# One operand with unused vector element size
+@rdn_e0 ........ .. ........... . ..... rd:5 \
+ &rr_esz rn=%reg_movprfx esz=0
+
# Two operand with unused vector element size
@pd_pn_e0 ........ ........ ....... rn:4 . rd:4 &rr_esz esz=0
@@ -1419,3 +1423,9 @@ STNT1_zprz 1110010 .. 00 ..... 001 ... ..... ..... \
# SVE2 32-bit scatter non-temporal store (vector plus scalar)
STNT1_zprz 1110010 .. 10 ..... 001 ... ..... ..... \
@rprr_scatter_store xs=0 esz=2 scale=0
+
+#### SVE2 Crypto Extensions
+
+## SVE2 crypto unary operations
+AESMC 01000101 00 10000011100 0 00000 ..... @rdn_e0
+AESIMC 01000101 00 10000011100 1 00000 ..... @rdn_e0
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 86c3d0ed11..6523621d21 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -7956,3 +7956,23 @@ static bool trans_SQRDCMLAH_zzzz(DisasContext *s,
arg_CMLA_zzzz *a)
};
return do_sve2_zzzz_fn(s, a->rd, a->rn, a->rm, a->ra, fns[a->esz], a->rot);
}
+
+#define DO_SVE2_AES_CRYPTO(NAME, name, DECRYPT) \
+static bool trans_##NAME(DisasContext *s, arg_rr_esz *a) \
+{ \
+ if (!dc_isar_feature(aa64_sve2_aes, s)) { \
+ return false; \
+ } \
+ if (sve_access_check(s)) { \
+ unsigned vsz = vec_full_reg_size(s); \
+ tcg_gen_gvec_2_ool(vec_full_reg_offset(s, a->rd), \
+ vec_full_reg_offset(s, a->rn), \
+ vsz, vsz, DECRYPT, gen_helper_crypto_##name);\
+ } \
+ return true; \
+}
+
+DO_SVE2_AES_CRYPTO(AESMC, aesmc, 0)
+DO_SVE2_AES_CRYPTO(AESIMC, aesmc, 1)
+DO_SVE2_AES_CRYPTO(AESE, aese, 0)
+DO_SVE2_AES_CRYPTO(AESD, aese, 1)
--
2.17.1
