On Wed, 3 Jun 2020 at 02:13, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Replace existing uses of check_data_tbi in translate-a64.c that
> perform a single logical memory access.  Leave the helper blank
> for now to reduce the patch size.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>

> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index c4f86c69ba..9f8ae99cc0 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -204,20 +204,20 @@ static void gen_a64_set_pc(DisasContext *s, TCGv_i64 
> src)
>  }
>
>  /*
> - * Return a "clean" address for ADDR according to TBID.
> - * This is always a fresh temporary, as we need to be able to
> - * increment this independently of a dirty write-back address.
> + * Handle MTE and/or TBI.
> + *
> + * For TBI, ideally, we would do nothing.  Proper behaviour on fault is
> + * for the tag to be present in the FAR_ELx register.  But for user-only
> + * mode, we do not have a TLB with which to implement this, so we must
> + * remote the top byte now.

"remove".

Otherwise
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>

thanks
-- PMM

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