On Fri, 19 Jun 2020 at 19:26, Gautam Bhat <mindentr...@gmail.com> wrote: > Basically I want to model ARM structure as below: > > ARM Core <-- APB---> I2C Controller <------> I2C device. > > Is the APB emulated?
We don't model "you have memory mapped registers" type buses at a level of detail where APB vs AHB vs whatever matters: they're all just sysbus from QEMU's point of view. -- PMM
