On 6/30/20 10:13 AM, Philippe Mathieu-Daudé wrote:
> Introduce the 'malta-phys' machine, aiming to have the same
> limitations as real hardware. Start by restricting the RAM
> to 1GB, which is the maximum amount of memory the GT-64120A
> north bridge can address.

Oops wrong comment, it ended mixed from previous patch while
rebasing. Corrected:

"Start with 32 MB which is the default on the CoreLV, and
allow up to 256 MB which is the maximum this card can
accept. See MIPS Document Number: MD00051 Revision 01.07"

> 
> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
> ---
>  hw/mips/malta.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/hw/mips/malta.c b/hw/mips/malta.c
> index 1ca41b44db..013bf9272c 100644
> --- a/hw/mips/malta.c
> +++ b/hw/mips/malta.c
> @@ -1479,11 +1479,32 @@ static void malta_machine_virt_class_init(ObjectClass 
> *oc, void *data)
>      mmc->max_ramsize = 2 * GiB;
>  }
>  
> +static void malta_machine_phys_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    MaltaMachineClass *mmc = MALTA_MACHINE_CLASS(oc);
> +
> +    mc->desc = "MIPS Malta Core LV (physically limited as real hardware)";
> +    mc->block_default_type = IF_PFLASH;
> +    mc->max_cpus = 1;
> +#ifdef TARGET_MIPS64
> +    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kc");
> +#else
> +    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("4Kc");
> +#endif
> +    mc->default_ram_size = 32 * MiB;
> +    mmc->max_ramsize = 256 * MiB; /* 32 MByte PC100 SDRAM DIMMs x 4 slots */
> +};
> +
>  static const TypeInfo malta_machine_types[] = {
>      {
>          .name          = MACHINE_TYPE_NAME("malta-virt"),
>          .parent        = TYPE_MALTA_MACHINE,
>          .class_init    = malta_machine_virt_class_init,
> +    }, {
> +        .name          = MACHINE_TYPE_NAME("malta-phys"),
> +        .parent        = TYPE_MALTA_MACHINE,
> +        .class_init    = malta_machine_phys_class_init,
>      }, {
>          .name          = TYPE_MALTA_MACHINE,
>          .parent        = TYPE_MACHINE,
> 


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