On Thu, Jul 16, 2020 at 04:20:18PM +0800, Xiaoyao Li wrote:
> Per Intel SDM vol 1, 13.2, if CPUID.1:ECX.XSAVE[bit 26] is 0, the
> processor provides no further enumeration through CPUID function 0DH.
Can you explain what's the bug you are trying to fix?
env->features[FEAT_XSAVE_COMP_*] is already initialized as zero.
>
> Signed-off-by: Xiaoyao Li <xiaoyao...@intel.com>
> ---
> target/i386/cpu.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 1e5123251d74..f5f11603e805 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -6261,6 +6261,8 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
> uint64_t mask;
>
> if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
> + env->features[FEAT_XSAVE_COMP_LO] = 0;
> + env->features[FEAT_XSAVE_COMP_HI] = 0;
> return;
> }
>
> --
> 2.18.4
>
--
Eduardo
