On 9/10/20 10:38 AM, Peter Maydell wrote: > The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN > bit in short-descriptor translation table format descriptors. This > is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the > feature bit with an ID register check, in line with our preference > for ID register checks over feature bits. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/cpu.h | 15 ++++++++++++++- > target/arm/cpu.c | 1 - > target/arm/helper.c | 5 +++-- > 3 files changed, 17 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
