On 11/3/20 10:32 AM, AlexChen wrote: > According to the loongson spec > (http://www.loongson.cn/uploadfile/cpu/3B1500/Loongson_3B1500_cpu_user_1.pdf) > and the macro definition(#define R_PERCORE_ISR(x) (0x40 + 0x8 * x)), we know > that the ISR size of per CORE is 8, so here we need to divide > (addr - R_PERCORE_ISR(0)) by 8, not 4. > > Reported-by: Euler Robot <euler.ro...@huawei.com> > Signed-off-by: Alex Chen <alex.c...@huawei.com> > --- > hw/intc/loongson_liointc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-)
For a model added in 2020, its code style is a bit disappointing (leading to that kind of hidden bugs). I'm even surprised it passed the review process. Thanks for the fix. Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
