On 11/2/20 2:58 AM, remi.denis.courm...@huawei.com wrote: > From: Rémi Denis-Courmont <remi.denis.courm...@huawei.com> > > This adds handling for the SCR_EL3.EEL2 bit. > > A translation block flag is added in A32 mode to route exceptions > correctly from AArch32 S-EL1 to (AArch64) S-EL2. > > Signed-off-by: Rémi Denis-Courmont <remi.denis.courm...@huawei.com> > --- > target/arm/cpu.c | 2 +- > target/arm/cpu.h | 11 ++++++++--- > target/arm/helper.c | 19 +++++++++++++++++-- > target/arm/translate.c | 6 ++++-- > target/arm/translate.h | 1 + > 5 files changed, 31 insertions(+), 8 deletions(-)
Annoying that a new hflags bit is required, but I don't see a good way around that. Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
