Hi Michael, On 11/23/20 5:41 PM, Michael Peter wrote: > Public bug reported: > > Hello, > > we have come across a strange behavior in the Zynq7000 model of Qemu > that seems to have been introduced between 5.0.0 and 5.1.0. > > > The reset values of the SLCR register, in particular those for UART_CLK_CTRL, > are such that > the UARTs should find functional clocks. Up to 5.0.0 this was also the > behavior that was > implemented in QEMU. > > Starting in 5.1.0, we found that - despite correct reset values [1] - the > UARTs are non-functional > upon reset. Some investigation revealed that the cause for that is that the > corresponding > clocks are not properly initialized. > > Between 5.0.0 and 5.1.0, there are three commits that touch the Zynq > UART clocks [2]. The last of them [3] triggers the faulty behavior. > > Attached is a patch that applies 5.2.0-rc2 and yields a functional UART. We > surmise that the > underlying device release issue runs much deeper, so it is only meant to > identify the issue. > > > [1] hw/misc/zynq_slcr.c > static void zynq_slcr_reset_init(Object *obj, ResetType type) > s->regs[R_UART_CLK_CTRL] = 0x00003F03; > [2] 38867cb7ec90..5b49a34c6800 > [3] commit 5b49a34c6800d0cb917f959d8e75e5775f0fac3f (refs/bisect/bad) > Author: Damien Hedde <damien.he...@greensocs.com> > Date: Mon Apr 6 15:52:50 2020 +0200 > > ** Affects: qemu > Importance: Undecided > Status: New > > ** Patch added: "0001-Initialize-Zynq7000-UART-clocks-on-reset.patch" > > https://bugs.launchpad.net/bugs/1905297/+attachment/5437267/+files/0001-Initialize-Zynq7000-UART-clocks-on-reset.patch >
Can you post your patch to the mailing list please? See: https://wiki.qemu.org/Contribute/SubmitAPatch#Do_not_send_as_an_attachment Note, you must sign your patch with a Signed-off-by: line, see: https://wiki.qemu.org/Contribute/SubmitAPatch#Patch_emails_must_include_a_Signed-off-by:_line Regards, Phil.
