Re: [PATCH 0/3] target/mips: Add some CP0/MMU missing definitions

[Philippe Mathieu-Daudé]

On 12/1/20 2:28 PM, Philippe Mathieu-Daudé wrote:
> Add some MIPS3 and R6 definitions to ease code review.
> 
> Philippe Mathieu-Daudé (3):
>   target/mips: Add CP0 Config0 register definitions for MIPS3 ISA
>   target/mips: Replace CP0_Config0 magic values by proper definitions
>   target/mips: Explicit Release 6 MMU types
> 
>  target/mips/cpu.h                | 11 +++++++++--
>  target/mips/internal.h           |  9 +++++----
>  target/mips/translate_init.c.inc | 14 ++++++++------
>  3 files changed, 22 insertions(+), 12 deletions(-)

Thanks, applied to mips-next.