Thanks. I'll take patch 1 out of the next version. On Mon, Feb 8, 2021 at 9:01 AM Peter Maydell <peter.mayd...@linaro.org> wrote:
> On Fri, 29 Jan 2021 at 01:04, Hao Wu <wuhao...@google.com> wrote: > > > > This patch set implements the System manager bus (SMBus) module in > NPCM7XX > > SoC. Basically, it emulates the data transactions of the module, not the > > SDA/SCL levels. We have also added a QTest which contains read and write > > operations for both single-byte and FIFO mode, and added basic I2C > devices > > for npcm750-evb and quanta-gsj boards. > > > > We also cleaned up the unimplemented GPIO devices in npcm7xx.c since they > > are already implemented. > > > > Changes since v1: > > - Fix errors for i2c device addresses for temperature sensors in GSJ > machine > > - Use at24c device to emulate GSJ EEPROM. It supports more than 256 > bytes. > > - Fill in VMState in npcm7xx_smbus.c > > - Change commit message in patch 3 and 4 > > - Fix order in npcm7xx.c IRQ list > > - Add a few extra comments to make things clearer > > > > Hao Wu (6): > > hw/arm: Remove GPIO from unimplemented NPCM7XX > > hw/i2c: Implement NPCM7XX SMBus Module Single Mode > > hw/arm: Add I2C sensors for NPCM750 eval board > > hw/arm: Add I2C sensors and EEPROM for GSJ machine > > hw/i2c: Add a QTest for NPCM7XX SMBus Device > > hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode > > Hi; I'm going to apply patch 1 to target-arm.next because it's not > really related to the others in the series. For the rest, I left > a couple of review comments but they're pretty minor. > > thanks > -- PMM >
