Hi Edgar,
On Tue, Feb 23, 2021 at 5:01 PM Edgar E. Iglesias
<edgar.igles...@gmail.com> wrote:
>
> On Mon, Feb 22, 2021 at 09:05:12PM +0800, Bin Meng wrote:
> > From: Xuzhou Cheng <xuzhou.ch...@windriver.com>
> >
> > Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream
> > link of GQSPI to CSU DMA.
> >
> > Signed-off-by: Xuzhou Cheng <xuzhou.ch...@windriver.com>
> > Signed-off-by: Bin Meng <bin.m...@windriver.com>
> >
> > ---
> >
> > Changes in v4:
> > - Rename "csu_dma" to "qspi_dma"
> >
> > Changes in v3:
> > - new patch: xlnx-zynqmp: Add XLNX CSU DMA module
> >
> > include/hw/arm/xlnx-zynqmp.h | 2 ++
> > hw/arm/xlnx-zynqmp.c | 14 ++++++++++++++
> > hw/arm/Kconfig | 1 +
> > 3 files changed, 17 insertions(+)
> >
> > diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> > index be15cc8814..2edeed911c 100644
> > --- a/include/hw/arm/xlnx-zynqmp.h
> > +++ b/include/hw/arm/xlnx-zynqmp.h
> > @@ -35,6 +35,7 @@
> > #include "target/arm/cpu.h"
> > #include "qom/object.h"
> > #include "net/can_emu.h"
> > +#include "hw/dma/xlnx_csu_dma.h"
> >
> > #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
> > OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
> > @@ -108,6 +109,7 @@ struct XlnxZynqMPState {
> > XlnxZynqMPRTC rtc;
> > XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
> > XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
> > + XlnxCSUDMA qspi_dma;
> >
> > char *boot_cpu;
> > ARMCPU *boot_cpu_ptr;
> > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> > index 49465a2794..30f43dfda2 100644
> > --- a/hw/arm/xlnx-zynqmp.c
> > +++ b/hw/arm/xlnx-zynqmp.c
> > @@ -50,6 +50,7 @@
> > #define QSPI_ADDR 0xff0f0000
> > #define LQSPI_ADDR 0xc0000000
> > #define QSPI_IRQ 15
> > +#define QSPI_DMA_ADDR 0xff0f0800
> >
> > #define DP_ADDR 0xfd4a0000
> > #define DP_IRQ 113
> > @@ -63,6 +64,8 @@
> > #define RTC_ADDR 0xffa60000
> > #define RTC_IRQ 26
> >
> > +
> > +
>
> These blank lines look un-related, if you remove them, this looks good to me:
>
> Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Thanks for the review.
A RESEND version was already sent out to the ML before. Sorry for the
inconvenience.
http://patchwork.ozlabs.org/project/qemu-devel/patch/20210222131502.3098-4-bmeng...@gmail.com/
Regards,
Bin
