The AST2600 allocates individual GIC IRQ lines for the LPC sub-devices. This is a contrast to the AST2400 and AST2500 which use one shared VIC IRQ line for the LPC sub-devices. Switch the iBT device to use the GIC IRQ ID documented in the datasheet.
While we're here, set the number of IRQs to the allocated number of IRQs in the datasheet. Signed-off-by: Andrew Jeffery <and...@aj.id.au> --- hw/arm/aspeed_ast2600.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index bc0eeb058b24..2125a96ef317 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -65,7 +65,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { #define ASPEED_A7MPCORE_ADDR 0x40460000 -#define AST2600_MAX_IRQ 128 +#define AST2600_MAX_IRQ 197 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ static const int aspeed_soc_ast2600_irqmap[] = { @@ -98,7 +98,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_DEV_WDT] = 24, [ASPEED_DEV_PWM] = 44, [ASPEED_DEV_LPC] = 35, - [ASPEED_DEV_IBT] = 35, /* LPC */ + [ASPEED_DEV_IBT] = 143, [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */ [ASPEED_DEV_ETH1] = 2, [ASPEED_DEV_ETH2] = 3, -- 2.27.0