On 2/19/21 3:46 PM, Peter Maydell wrote: > For the AN547 image, the FPGAIO block has an extra DBGCTRL register, > which is used to control the SPNIDEN, SPIDEN, NPIDEN and DBGEN inputs > to the CPU. These signals control when the CPU permits use of the > external debug interface. Our CPU models don't implement the > external debug interface, so we model the register as > reads-as-written. > > Implement the register, with a property defining whether it is > present, and allow mps2-tz boards to specify that it is present. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > include/hw/misc/mps2-fpgaio.h | 2 ++ > hw/arm/mps2-tz.c | 5 +++++ > hw/misc/mps2-fpgaio.c | 22 ++++++++++++++++++++-- > 3 files changed, 27 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
