On Mon, 8 Mar 2021 at 11:57, Peter Maydell <peter.mayd...@linaro.org> wrote: > > v3: fix test failure on 32-bit hosts due to new board defaulting to 2GB RAM. > > -- PMM > > The following changes since commit 9a7beaad3dbba982f7a461d676b55a5c3851d312: > > Merge remote-tracking branch > 'remotes/alistair/tags/pull-riscv-to-apply-20210304' into staging (2021-03-05 > 10:47:46 +0000) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20210308 > > for you to fetch changes up to 50b52b18cdb9294ce83dd49bb60b8e55a6526ea0: > > hw/arm/mps2: Update old infocenter.arm.com URLs (2021-03-08 11:54:16 +0000) > > ---------------------------------------------------------------- > target-arm queue: > * sbsa-ref: remove cortex-a53 from list of supported cpus > * sbsa-ref: add 'max' to list of allowed cpus > * target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe > * npcm7xx: add EMC model > * xlnx-zynqmp: Remove obsolete 'has_rpu' property > * target/arm: Speed up aarch64 TBL/TBX > * virtio-mmio: improve virtio-mmio get_dev_path alog > * target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks > * target/arm: Restrict v8M IDAU to TCG > * target/arm/cpu: Update coding style to make checkpatch.pl happy > * musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB > surfaces > * Add new board: mps3-an524
Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0 for any user-visible changes. -- PMM
