This function is used in !TCG cases, so it has been moved into a file
that is compiled when --disable-tcg is selected.
Signed-off-by: Bruno Larsen (billionai) <bruno.lar...@eldorado.org.br>
---
target/ppc/cpu.c | 11 +++++++++++
target/ppc/misc_helper.c | 10 ----------
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index 0ab7ac1af1..8a82e2ffa8 100644
--- a/target/ppc/cpu.c
+++ b/target/ppc/cpu.c
@@ -24,6 +24,7 @@
#include "exec/log.h"
#include "fpu/softfloat-helpers.h"
#include "mmu-hash64.h"
+#include "helper_regs.h"
target_ulong cpu_read_xer(CPUPPCState *env)
{
@@ -90,3 +91,13 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value)
/* FIXME: Should check for valid HTABMASK values in 32-bit case */
env->spr[SPR_SDR1] = value;
}
+
+void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
+{
+ PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+ CPUPPCState *env = &cpu->env;
+
+ env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
+ /* The gtse bit affects hflags */
+ hreg_compute_hflags(env);
+}
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index b910ac6479..442b12652c 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -255,16 +255,6 @@ target_ulong helper_clcs(CPUPPCState *env, uint32_t arg)
/*****************************************************************************/
/* Special registers manipulation */
-void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
-{
- PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
- CPUPPCState *env = &cpu->env;
-
- env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
- /* The gtse bit affects hflags */
- hreg_compute_hflags(env);
-}
-
/*
* This code is lifted from MacOnLinux. It is called whenever THRM1,2
* or 3 is read an fixes up the values in such a way that will make
--
2.17.1
