Excerpts from David Gibson's message of May 17, 2021 3:39 pm: > On Mon, May 17, 2021 at 12:46:51PM +1000, Nicholas Piggin wrote: >> ISA v3.1 adds new variations of wait, specified by the WC field. These >> are not compatible with the wait 0 implementation, because they add >> additional conditions that cause the processor to resume, which can >> cause software to hang or run very slowly. >> >> Add the new wait variants with a trivial no-op implementation, which is >> allowed, as explained in comments: software must not depend on any >> particular architected WC condition having caused resumption of >> execution, therefore a no-op implementation is architecturally correct. >> >> Signed-off-by: Nicholas Piggin <npig...@gmail.com> > > Logic looks fine. There is no test on the CPU's features or model > here, though, so this will change behaviour for pre-3.1 CPUs as well.
Huh. 2.06-2.07 has very similar WC bits as 3.1, but 3.0 removed them and made them reserved. I should have looked back but I'd assumed they weren't there either. Existing code treats WC != 0 as invalid on pre-3.0 processors AFAIKS, so that's not quite right for 2.06-7 (they should look more like 3.1). But before that it looks like it was just wait with no WC field. > What would invoking these wait variants (presumably reserved) on > earlier CPUs do? Prior to 2.06, it looks like there is no WC field, and so they should generate a program check. So that just leaves the incorrect program checks for 2.06-7, something like this should do it: -GEN_HANDLER_E(wait, 0x1F, 0x1E, 0x00, 0x039FF801, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(wait, 0x1F, 0x1E, 0x00, 0x039FF801, PPC_NONE, PPC2_ISA206), 2.06-3.1 should all be fine with this patch, AFAIKS they all have words to the effect that WC != 0 is subject to implementation defined behaviour and may be treated as a no-op or not implemented. Thanks, Nick
