From: Matheus Ferst <matheus.fe...@eldorado.org.br> This series provides the basic infrastructure for adding the new 32/64-bit instructions in Power ISA 3.1 to target/ppc.
v5: - Rebase on ppc-for-6.1; - Change copyright line from new files; - Remove argument set from PNOP; - Add comments to explain helper_cfuged implementation; - New REQUIRE_ALTIVEC macro; - REQUIRE_ALTIVEC and REQUIRE_INSNS_FLAGS2 in trans_CFUGED; - cmp/cmpi/cmpl/cmpli moved to decodetree. v4: - Rebase on ppc-for-6.1; - Fold do_ldst_D and do_ldst_X; - Add tcg_const_tl, used to share do_ldst_D and do_ldst_X code; - Unfold prefixed and non-prefixed loads/stores/addi to let non-prefixed insns use the non-prefixed formats; - PNOP invalid suffixes; - setbc/setbcr/stnbc/setnbcr implemented; - cfuged/vcfuged implemented; - addpcis moved to decodetree. v3: - More changes for decodetree. - Cleanup exception/is_jmp logic to the point exception is removed. - Fold in Luis' isa check for prefixed insn support. - Share trans_* between prefixed and non-prefixed instructions. - Use macros to minimize the trans_* boilerplate. - Fix decode mistake for STHX/STHXU. v2: - Store current pc in ctx instead of insn_size - Use separate decode files for 32- and 64-bit instructions - Improvements to the exception/is_jmp logic - Use translator_loop_temp_check() - Moved logic to prevent translation from crossing page boundaries - Additional instructions using decodetree: addis, pnop, loads/stores - Added check for prefixed insn support in cpu flags Matheus Ferst (6): TCG: add tcg_constant_tl target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions target/ppc: Implement cfuged instruction target/ppc: Implement vcfuged instruction target/ppc: Move addpcis to decodetree target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree Richard Henderson (17): target/ppc: Introduce gen_icount_io_start target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN target/ppc: Remove DisasContext.exception target/ppc: Move single-step check to ppc_tr_tb_stop target/ppc: Tidy exception vs exit_tb target/ppc: Mark helper_raise_exception* as noreturn target/ppc: Use translator_loop_temp_check target/ppc: Introduce macros to check isa extensions target/ppc: Move page crossing check to ppc_tr_translate_insn target/ppc: Add infrastructure for prefixed insns target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI target/ppc: Implement PNOP target/ppc: Move D/DS/X-form integer loads to decodetree target/ppc: Implement prefixed integer load instructions target/ppc: Move D/DS/X-form integer stores to decodetree target/ppc: Implement prefixed integer store instructions include/tcg/tcg-op.h | 2 + linux-user/ppc/cpu_loop.c | 6 - target/ppc/cpu.h | 4 +- target/ppc/helper.h | 5 +- target/ppc/insn32.decode | 126 ++++ target/ppc/insn64.decode | 124 ++++ target/ppc/int_helper.c | 62 ++ target/ppc/meson.build | 9 + target/ppc/translate.c | 659 +++++---------------- target/ppc/translate/fixedpoint-impl.c.inc | 279 +++++++++ target/ppc/translate/vector-impl.c.inc | 56 ++ 11 files changed, 820 insertions(+), 512 deletions(-) create mode 100644 target/ppc/insn32.decode create mode 100644 target/ppc/insn64.decode create mode 100644 target/ppc/translate/fixedpoint-impl.c.inc create mode 100644 target/ppc/translate/vector-impl.c.inc -- 2.25.1
