Hi Richard, On Tue, May 18, 2021 at 1:11 PM Richard Henderson <richard.hender...@linaro.org> wrote: > On 5/17/21 3:52 PM, Max Filippov wrote: > > @@ -1784,10 +1770,11 @@ static void translate_l32e(DisasContext *dc, const > > OpcodeArg arg[], > > const uint32_t par[]) > > { > > TCGv_i32 addr = tcg_temp_new_i32(); > > + MemOp al; > > > > tcg_gen_addi_i32(addr, arg[1].in, arg[2].imm); > > - gen_load_store_alignment(dc, 2, addr, false); > > - tcg_gen_qemu_ld_tl(arg[0].out, addr, dc->ring, MO_TEUL); > > + al = gen_load_store_alignment(dc, 2, addr, false); > > + tcg_gen_qemu_ld_tl(arg[0].out, addr, dc->ring, MO_TEUL | al); > > You're duplicating the information about the size of the alignment. > > I think it would be better to pass the partial MemOp into > get_load_store_alignment and return the complete MemOp. E.g.:
That indeed looks better. Let me make another version of this patch. Thanks for taking a look! -- Thanks. -- Max