MVE has an FPSCR.QC bit similar to the A-profile Neon one; when MVE is implemented make the bit writeable.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> --- target/arm/vfp_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index e0886ab5a56..11e1e087e81 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -220,7 +220,8 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val) FPCR_LTPSIZE_LENGTH); } - if (arm_feature(env, ARM_FEATURE_NEON)) { + if (arm_feature(env, ARM_FEATURE_NEON) || + cpu_isar_feature(aa32_mve, cpu)) { /* * The bit we set within fpscr_q is arbitrary; the register as a * whole being zero/non-zero is what counts. -- 2.20.1