From: Ilya Leoshkevich <i...@linux.ibm.com> tb_gen_code() assumes that tb->size must never be zero, otherwise it may produce spurious exceptions. For ARM this may happen when creating a translation block for the commpage.
Fix by pretending that commpage translation blocks have at least one instruction. Signed-off-by: Ilya Leoshkevich <i...@linux.ibm.com> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Message-Id: <20210416154939.32404-3-...@linux.ibm.com> Signed-off-by: Cornelia Huck <coh...@redhat.com> --- target/arm/translate.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index 455352bcf60f..8e0e55c1e0f5 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8981,6 +8981,7 @@ static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) unsigned int insn; if (arm_pre_translate_insn(dc)) { + dc->base.pc_next += 4; return; } @@ -9050,6 +9051,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) bool is_16bit; if (arm_pre_translate_insn(dc)) { + dc->base.pc_next += 2; return; } -- 2.31.1