On 6/9/21 3:01 AM, Peter Maydell wrote:
Is the spec forward looking to more than 7 Q registers?
It's tempting to just drop the D:Qd from the decode...
I don't know, but looking at the decode it certainly seems
like the door is being left open to Q8..Q15. Other signs of
this include the existence of the VFPSmallRegisterBank()
function and the way that VLLDM and VLSTM have T2 encodings
whose only difference from the T1 encodings is that you can
specify registers up to D31. Decoding D:Qd and then doing the
range check seemed more in line with the spirit of this...
I agree. We should leave the decode in place.
Do you think it's worthwhile adding a single hook for the register range check
now? E.g.
if (!mve_check_qreg_bank(s, a->qd | a->qn | a->qm)) {
return false;
}
static bool mve_check_qreg_bank(DisasContext *s, int qmask)
{
/*
* See VFPSmallRegisterBank, always true for armv8.1-m.
* So only Q0...Q7 are supported.
*/
return qmask < 8;
}
And, as needed, another one for dregs.
r~
