On 7/12/21 3:11 PM, BALATON Zoltan wrote:
> The switch case of writing PCI 1 IO base address had an extra break
> statement that made part of the code unreachable. This did not cause a
> problem as guests ususally leave this register at its default value.
>
> Reported-by: Coverity (CID 1458135)
Fixes: dcdf98a9015 ("Add emulation of Marvell MV64361 PPC system
controller")
?
> Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu>
> ---
> hw/pci-host/mv64361.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
> index 20510d8680..92b0f5d047 100644
> --- a/hw/pci-host/mv64361.c
> +++ b/hw/pci-host/mv64361.c
> @@ -687,7 +687,6 @@ static void mv64361_write(void *opaque, hwaddr addr,
> uint64_t val,
> case MV64340_PCI_1_IO_BASE_ADDR:
> s->pci[1].io_base = val & 0x30fffffULL;
> warn_swap_bit(val);
> - break;
> if (!(s->cpu_conf & BIT(27))) {
> s->pci[1].remap[4] = (val & 0xffffULL) << 16;
> }
>
