On Mon, Aug 23, 2021 at 4:14 PM Philippe Mathieu-Daudé <f4...@amsat.org> wrote:
>
> On 8/23/21 4:08 AM, Bin Meng wrote:
> > At present when input clock is disabled, any character transmitted
> > to tx fifo can still show on the serial line, which is wrong.
> >
> > Fixes: b636db306e06 ("hw/char/cadence_uart: add clock support")
> > Signed-off-by: Bin Meng <bmeng...@gmail.com>
> > ---
> >
> > hw/char/cadence_uart.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> > index b4b5e8a3ee..154be34992 100644
> > --- a/hw/char/cadence_uart.c
> > +++ b/hw/char/cadence_uart.c
> > @@ -327,6 +327,11 @@ static gboolean cadence_uart_xmit(void *do_not_use,
> > GIOCondition cond,
> > static void uart_write_tx_fifo(CadenceUARTState *s, const uint8_t *buf,
> > int size)
> > {
> > + /* ignore characters when unclocked or in reset */
> > + if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
> > + return;
> > + }
>
> Incorrect handler?
>
Sorry I don't get it. This patch is for the Tx path, while patch #3 is
for the Rx path.
> -- >8 --
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index b4b5e8a3ee0..4f096222f52 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -235,8 +235,16 @@ static void uart_parameters_setup(CadenceUARTState *s)
> static int uart_can_receive(void *opaque)
> {
> CadenceUARTState *s = opaque;
> - int ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
> - uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
> + int ret;
> + uint32_t ch_mode;
> +
> + /* ignore characters when unclocked or in reset */
> + if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
> + return 0;
> + }
> +
> + ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
> + ch_mode = s->r[R_MR] & UART_MR_CHMODE;
>
> if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
> ret = MIN(ret, CADENCE_UART_RX_FIFO_SIZE - s->rx_count);
Regards,
Bin
