On Tue, Aug 24, 2021 at 6:07 AM Richard Henderson <richard.hender...@linaro.org> wrote: > > Reviewed-by: Bin Meng <bmeng...@gmail.com> > Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > target/riscv/insn_trans/trans_rva.c.inc | 47 ++++++++++--------------- > 1 file changed, 19 insertions(+), 28 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_rva.c.inc > b/target/riscv/insn_trans/trans_rva.c.inc > index 3cc3c3b073..6ea07d89b0 100644 > --- a/target/riscv/insn_trans/trans_rva.c.inc > +++ b/target/riscv/insn_trans/trans_rva.c.inc > @@ -18,11 +18,10 @@ > * this program. If not, see <http://www.gnu.org/licenses/>. > */ > > -static inline bool gen_lr(DisasContext *ctx, arg_atomic *a, MemOp mop) > +static bool gen_lr(DisasContext *ctx, arg_atomic *a, MemOp mop) > { > - TCGv src1 = tcg_temp_new(); > - /* Put addr in load_res, data in load_val. */ > - gen_get_gpr(ctx, src1, a->rs1); > + TCGv src1 = get_gpr(ctx, a->rs1, EXT_ZERO); > + > if (a->rl) { > tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); > } > @@ -30,33 +29,33 @@ static inline bool gen_lr(DisasContext *ctx, arg_atomic > *a, MemOp mop) > if (a->aq) { > tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); > } > + > + /* Put addr in load_res, data in load_val. */ > tcg_gen_mov_tl(load_res, src1); > gen_set_gpr(ctx, a->rd, load_val); > > - tcg_temp_free(src1); > return true; > } > > -static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp mop) > +static bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp mop) > { > - TCGv src1 = tcg_temp_new(); > - TCGv src2 = tcg_temp_new(); > - TCGv dat = tcg_temp_new(); > + TCGv dest, src1, src2; > TCGLabel *l1 = gen_new_label(); > TCGLabel *l2 = gen_new_label(); > > - gen_get_gpr(ctx, src1, a->rs1); > + src1 = get_gpr(ctx, a->rs1, EXT_ZERO); > tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); > > - gen_get_gpr(ctx, src2, a->rs2); > /* > * Note that the TCG atomic primitives are SC, > * so we can ignore AQ/RL along this path. > */ > - tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, > + dest = dest_gpr(ctx, a->rd); > + src2 = get_gpr(ctx, a->rs2, EXT_NONE); > + tcg_gen_atomic_cmpxchg_tl(dest, load_res, load_val, src2, > ctx->mem_idx, mop); > - tcg_gen_setcond_tl(TCG_COND_NE, dat, src1, load_val); > - gen_set_gpr(ctx, a->rd, dat); > + tcg_gen_setcond_tl(TCG_COND_NE, dest, dest, load_val); > + gen_set_gpr(ctx, a->rd, dest); > tcg_gen_br(l2); > > gen_set_label(l1); > @@ -65,8 +64,7 @@ static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, > MemOp mop) > * provide the memory barrier implied by AQ/RL. > */ > tcg_gen_mb(TCG_MO_ALL + a->aq * TCG_BAR_LDAQ + a->rl * TCG_BAR_STRL); > - tcg_gen_movi_tl(dat, 1); > - gen_set_gpr(ctx, a->rd, dat); > + gen_set_gpr(ctx, a->rd, tcg_constant_tl(1)); > > gen_set_label(l2); > /* > @@ -75,9 +73,6 @@ static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, > MemOp mop) > */ > tcg_gen_movi_tl(load_res, -1); > > - tcg_temp_free(dat); > - tcg_temp_free(src1); > - tcg_temp_free(src2); > return true; > } > > @@ -85,17 +80,13 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a, > void(*func)(TCGv, TCGv, TCGv, TCGArg, MemOp), > MemOp mop) > { > - TCGv src1 = tcg_temp_new(); > - TCGv src2 = tcg_temp_new(); > + TCGv dest = dest_gpr(ctx, a->rd); > + TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE); > + TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE); > > - gen_get_gpr(ctx, src1, a->rs1); > - gen_get_gpr(ctx, src2, a->rs2); > + func(dest, src1, src2, ctx->mem_idx, mop); > > - (*func)(src2, src1, src2, ctx->mem_idx, mop); > - > - gen_set_gpr(ctx, a->rd, src2); > - tcg_temp_free(src1); > - tcg_temp_free(src2); > + gen_set_gpr(ctx, a->rd, dest); > return true; > } > > -- > 2.25.1 > >
