Re: [PATCH v1 1/2] target/riscv: Implement the stval/mtval illegal instruction

[Richard Henderson]

On 9/3/21 1:23 AM, Alistair Francis wrote:

+    target_ulong bins;

Surely uint32_t, at least until 64-bit insn width is required.

+    TCGv tmp = temp_new(ctx);
+
+    tcg_gen_movi_tl(tmp, ctx->opcode);
+    tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, bins));

  tcg_gen_st_i32(tcg_constant_i32(ctx->opcode),
                 cpu_env, offsetof(CPURISCVState, bins));


r~