KVM only allows userspace to access legal number of MSR_IA32_RTIT_ADDRn, which is enumrated by guest's CPUID(0x14,0x1):EAX[2:0], i.e., env->features[FEAT_14_1_EAX] & INTEL_PT_ADDR_RANGES_NUM_MASK
Signed-off-by: Xiaoyao Li <xiaoyao...@intel.com> --- target/i386/cpu.c | 1 - target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 8 ++++---- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2b50ccf79b92..5ff70a8cba54 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -545,7 +545,6 @@ static CPUCacheInfo legacy_l3_cache = { #define INTEL_PT_MAX_SUBLEAF 0x1 #define INTEL_PT_DEFAULT_ADDR_RANGES_NUM 0x2 -#define INTEL_PT_ADDR_RANGES_NUM_MASK 0x7 /* Support ART(0,3,6,9) */ #define INTEL_PT_DEFAULT_MTC_BITMAP 0x0249 /* Support 0,2^(0~11) */ diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e6236c371c4f..20e579f147f8 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -873,6 +873,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; /* Packets which contain IP payload have LIP values */ #define CPUID_14_0_ECX_LIP (1U << 31) +#define INTEL_PT_ADDR_RANGES_NUM_MASK 0x7 + /* CLZERO instruction */ #define CPUID_8000_0008_EBX_CLZERO (1U << 0) /* Always save/restore FP error pointers */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 500d2e0e686f..a90115da9ee5 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3088,8 +3088,8 @@ static int kvm_put_msrs(X86CPU *cpu, int level) } } if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) { - int addr_num = kvm_arch_get_supported_cpuid(kvm_state, - 0x14, 1, R_EAX) & 0x7; + int addr_num = env->features[FEAT_14_1_EAX] & + INTEL_PT_ADDR_RANGES_NUM_MASK; kvm_msr_entry_add(cpu, MSR_IA32_RTIT_CTL, env->msr_rtit_ctrl); @@ -3433,8 +3433,8 @@ static int kvm_get_msrs(X86CPU *cpu) } if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) { - int addr_num = - kvm_arch_get_supported_cpuid(kvm_state, 0x14, 1, R_EAX) & 0x7; + int addr_num = env->features[FEAT_14_1_EAX] & + INTEL_PT_ADDR_RANGES_NUM_MASK; kvm_msr_entry_add(cpu, MSR_IA32_RTIT_CTL, 0); kvm_msr_entry_add(cpu, MSR_IA32_RTIT_STATUS, 0); -- 2.27.0