On 9/27/21 01:07, Richard Henderson wrote:
> On 9/26/21 3:15 AM, Philippe Mathieu-Daudé wrote:
>> On 9/25/21 19:30, WANG Xuerui wrote:
>>> Signed-off-by: WANG Xuerui <g...@xen0n.name>
>>> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
>>> ---
>>> tcg/loongarch64/tcg-target.c.inc | 27 +++++++++++++++++++++++++++
>>> 1 file changed, 27 insertions(+)
>>
>>> +static void tcg_target_init(TCGContext *s)
>>> +{
>>> + tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS;
>>> + tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
>>> +
>>> + tcg_target_call_clobber_regs = ALL_GENERAL_REGS;
>>
>> If you plan to add support for vector registers later, I think it is
>> safer to start today with:
>>
>> tcg_target_call_clobber_regs = -1ull;
>
> It is not "safer", it is wrong -- there are bits set for which there are
> no registers.
OK, got it now, thanks.
