On 10/15/21 12:45 AM, frank.ch...@sifive.com wrote:
From: Frank Chang<frank.ch...@sifive.com>
TB_FLAGS mem_idx bits was extended from 2 bits to 3 bits in
commit: c445593, but other TB_FLAGS bits for rvv and rvh were
not shift as well so these bits may overlap with each other when
rvv is enabled.
Signed-off-by: Frank Chang<frank.ch...@sifive.com>
---
target/riscv/cpu.h | 14 +++++++-------
target/riscv/translate.c | 2 +-
2 files changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
