On 10/26/21 09:09, Alexander Graf wrote:
> On 26.10.21 02:14, Richard Henderson wrote:
>> On 10/25/21 12:13 PM, Alexander Graf wrote:
>>> @@ -1156,6 +1183,11 @@ int hvf_vcpu_exec(CPUState *cpu)
>>> hvf_exit->exception.physical_address, isv,
>>> iswrite, s1ptw, len, srt);
>>> + if (!isv) {
>>> + g_assert(hvf_emulate_insn(cpu));
>>> + advance_pc = true;
>>> + break;
>>> + }
>>> assert(isv);
>>
>> Ouch. HVF really passes along an invalid syndrome? I was expecting
>> that you'd be able to avoid all of the instruction parsing and check
>> syndrome.cm (bit 8) for a cache management instruction.
>
>
> That's a very subtle way of telling me I'm stupid :). Thanks for the
> catch! Using the CM bit is obviously way better. Let me build v2.
Having given my R-b I take half of the blame.
