Re: [PATCH 13/13] target/riscv: Enable uxl field write

[Richard Henderson]

On 11/1/21 6:01 AM, LIU Zhiwei wrote:
          mask |= MSTATUS_MPV | MSTATUS_GVA;
+        if ((val ^ mstatus) & MSTATUS64_UXL) {
+            mask |= MSTATUS64_UXL;
+        }

Why do you need the conditional here?
Why is this not just

    mask |= MSTATUS_MPV | MSTATUS_GVA | MSTATUS64_UXL;


 static bool trans_csrrw(DisasContext *ctx, arg_csrrw *a)
 {
-    TCGv src = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);

Hmm.  Not sure about this.

It looks like we should in fact change mask, just a few lines down, at which point the 
extension (or not) for the source would not matter.  And likewise in trans_csrrwi.


r~