On 15/11/2021 09:29, Richard Henderson wrote:
On 11/12/21 3:58 PM, Frédéric Pétrot wrote:
+ tcg_gen_qemu_ld_tl(memop & MO_BSWAP ? desth : destl, addrl,
+ ctx->mem_idx, MO_TEUQ);
This isn't correct. MO_BSWAP is related to the host, not the guest.
Argh! Thx for pointing out my misunderstanding.
You want
(memop & MO_BSWAP) == MO_LE ? destl : desth
Are there any big-endian RISC-V though?
Not that I know of, but the spec defines it since V2.0 (bitfields MBE/SBE/UBE
in mstatus), gcc supports it, and there is a check for it in get_dump_info
for the riscv, so I opted for adding that (wrong) line.
Since we can expect in the future endianness to be dynamic, you are probably
right that we should assume litte-endian accesses for now, as handling both
will anyway require many other changes.
Frédéric
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