On Fri, Dec 10, 2021 at 11:13 PM Cédric Le Goater <c...@kaod.org> wrote: > > On 12/10/21 15:33, Troy Lee wrote: > > On Fri, Dec 10, 2021 at 10:05 PM Cédric Le Goater <c...@kaod.org> wrote: > >> > >> On 12/10/21 09:30, Troy Lee wrote: > >>> AST2600 Display Port MCU introduces 0x18000000~0x1803FFFF as it's memory > >>> and io address. If guest machine try to access DPMCU memory, it will > >>> cause a fatal error. > >> > >> The Aspeed SoCs have an "aspeed_soc.io" region for unimplemented devices > >> but it's too small. Anyhow, it is better to have per logic unit. We should > >> change that one day. > >> > > Good idea! > > > >> For my information, which FW image are you using ? > >> > > > > We're using Aspeed's SDK image, I tested with ast2600-default machine. > > Prebuilt image can be download from: > > https://github.com/AspeedTech-BMC/openbmc/releases/tag/v07.02 > > Excellent ! Is there one I could try in particular ? You could use ast2600-default-obmc.tgz, but we will send another patch for HACE engine.
> > > Once correctly supported, we should include one of these SDK images in : > > tests/avocado/boot_linux_console.py > > to complete our tests of the device models. Sure, once the image successfully boots into rootfs, I'll add a test case for it. > QEMU is not making much difference between the revision. You might need > to improve that. > > > Without declaring the DPMCU memory, the image will hangs in u-boot. > > yeah. You can use -d guest_errors,unimp to catch accesses done on AHB > windows not covered by the QEMU models. There are plenty of ways to > move past U-Boot when models are not implemented yet. Don't waste > too much time, just ask. > > eMMC is only on these branches : > > https://github.com/openbmc/qemu/ > https://github.com/legoater/qemu/ These two branches are very useful! > Same for SBC and support is primitive. > > > We're still working on I3C and SPI issue to be resolved to get into rootfs. > > I3C has not much support in Linux and none in QEMU. You will have to > add dummy models. Can I submit a dummy model that only responds to the RESET control register? Or it has to be well implemented like i2c/core.c and i2c/aspeed_i2c.c? > SPI as a non-SPI flash driver ? The SPI flash controller models should > be quite well covered today. What's the issue ? I need some more investigation, because we're using a different spi driver for fmc-spi. > > Thanks, > > C. Thanks, Troy Lee