Hello Richard!
On Tue, 14 Dec 2021 13:13:57 -0800
Richard Henderson <richard.hender...@linaro.org> wrote:
> On 12/14/21 1:12 PM, Richard Henderson wrote:
> > On 12/14/21 1:26 AM, Nikita Shubin wrote:
> >> - if (!pmp_get_num_rules(env) && (prev_priv != PRV_M)) {
> >> + if (riscv_feature(env, RISCV_FEATURE_PMP) &&
> >> + !pmp_get_num_rules(env) && (prev_priv != PRV_M)) {
> >
> > When would the number of rules become non-zero with PMP disabled?
> > When does this test make a difference?
>
> Oh, nevermind, I see what you mean.
>
Np, let me explain in details:
The ISA states:
> Platforms vary widely in demands for physical memory protection, and
> some platforms may provide other PMP structures in addition to or
> instead of the scheme described in this section.
So we might don't have PMP at all, but if we set
qdev_prop_set_bit(DEVICE(obj), "pmp", false);
for some CPU we still end up in illegal inst on mret, cause we get
pmp_get_num_rules(env) == 0, becouse we have no PMP which leads to zero
available rules.
>
> r~
>
