Peter Maydell <peter.mayd...@linaro.org> writes:
> The ITS has several tables which all share a similar format, > described by the TableDesc struct: the guest may configure them > to be a single-level table or a two-level table. Currently we > open-code the process of finding the table entry in all the > functions which read or write the device table or the collection > table. Factor out the "get the address of the table entry" > logic into a new function, so that the code which needs to > read or write a table entry only needs to call table_entry_addr() > and then perform a suitable load or store to that address. > > Note that the error handling is slightly complicated because > we want to handle two cases differently: > * failure to read the L1 table entry should end up causing > a command stall, like other kinds of DMA error > * an L1 table entry that says there is no L2 table for this > index (ie whose valid bit is 0) must result in us treating > the table entry as not-valid on read, and discarding > writes (this is mandated by the spec) > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Reviewed-by: Alex Bennée <alex.ben...@linaro.org> -- Alex Bennée