Re: [PATCH v1 5/6] hw/misc: Add a model of the Xilinx ZynqMP APU Control

[Philippe Mathieu-Daudé via]

On 31/1/22 00:12, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>

Add a model of the Xilinx ZynqMP APU Control.

Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
---
  include/hw/misc/xlnx-zynqmp-apu-ctrl.h |  91 +++++++++
  hw/misc/xlnx-zynqmp-apu-ctrl.c         | 257 +++++++++++++++++++++++++
  hw/misc/meson.build                    |   1 +
  3 files changed, 349 insertions(+)
  create mode 100644 include/hw/misc/xlnx-zynqmp-apu-ctrl.h
  create mode 100644 hw/misc/xlnx-zynqmp-apu-ctrl.c

diff --git a/include/hw/misc/xlnx-zynqmp-apu-ctrl.h 
b/include/hw/misc/xlnx-zynqmp-apu-ctrl.h
new file mode 100644
index 0000000000..44bf264cef
--- /dev/null
+++ b/include/hw/misc/xlnx-zynqmp-apu-ctrl.h
@@ -0,0 +1,91 @@
+/*
+ * QEMU model of ZynqMP APU Control.
+ *
+ * Copyright (c) 2013-2022 Xilinx Inc
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Written by Peter Crosthwaite <peter.crosthwa...@xilinx.com> and
+ * Edgar E. Iglesias <edgar.igles...@xilinx.com>
+ *
+ */
+
+#include "hw/sysbus.h"
+#include "hw/register.h"
+#include "target/arm/cpu.h"
+
+#define TYPE_XLNX_ZYNQMP_APU_CTRL "xlnx.apu-ctrl"
+
+#define XLNX_ZYNQMP_APU(obj) \
+     OBJECT_CHECK(XlnxZynqMPAPUCtrl, (obj), TYPE_XLNX_ZYNQMP_APU_CTRL)

...

+#define APU_R_MAX ((R_PWRSTAT) + 1)
+
+#define NUM_CPUS 4

Hmm isn't it APU_MAX_CPU?

+typedef struct XlnxZynqMPAPUCtrl {
+    SysBusDevice busdev;
+
+    ARMCPU *cpus[NUM_CPUS];
+    /* WFIs towards PMU. */
+    qemu_irq wfi_out[4];
+    /* CPU Power status towards INTC Redirect. */
+    qemu_irq cpu_power_status[4];
+    qemu_irq irq_imr;
+
+    uint8_t cpu_pwrdwn_req;
+    uint8_t cpu_in_wfi;
+
+    RegisterInfoArray *reg_array;
+    uint32_t regs[APU_R_MAX];
+    RegisterInfo regs_info[APU_R_MAX];
+} XlnxZynqMPAPUCtrl;