On Tue, Feb 15, 2022 at 06:41:30PM -0300, Fabiano Rosas wrote: > We're considering these two to be from different CPU families, so > duplicate some code to keep them separate. > > Signed-off-by: Fabiano Rosas <faro...@linux.ibm.com>
Reviewed-by: David Gibson <da...@gibson.dropbear.id.au>
> ---
> target/ppc/cpu_init.c | 107 +++++++++++++++++++++++++++++++++++-------
> 1 file changed, 91 insertions(+), 16 deletions(-)
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 6a367f2bbc..79cd14d49c 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -803,6 +803,97 @@ static void register_G2_sprs(CPUPPCState *env)
>
> static void register_74xx_sprs(CPUPPCState *env)
> {
> + /* Breakpoints */
> + spr_register_kvm(env, SPR_DABR, "DABR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + KVM_REG_PPC_DABR, 0x00000000);
> +
> + spr_register(env, SPR_IABR, "IABR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> + /* Cache management */
> + spr_register(env, SPR_ICTC, "ICTC",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> + /* Performance monitors */
> + spr_register(env, SPR_7XX_MMCR0, "MMCR0",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_MMCR1, "MMCR1",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_PMC1, "PMC1",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_PMC2, "PMC2",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_PMC3, "PMC3",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_PMC4, "PMC4",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_SIAR, "SIAR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_UMMCR0, "UMMCR0",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_UMMCR1, "UMMCR1",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_UPMC1, "UPMC1",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_UPMC2, "UPMC2",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_UPMC3, "UPMC3",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_UPMC4, "UPMC4",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +
> + spr_register(env, SPR_7XX_USIAR, "USIAR",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + /* External access control */
> + spr_register(env, SPR_EAR, "EAR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0x00000000);
> +
> /* Processor identification */
> spr_register(env, SPR_PIR, "PIR",
> SPR_NOACCESS, SPR_NOACCESS,
> @@ -4644,8 +4735,6 @@ static void init_proc_7400(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
>
> @@ -4718,8 +4807,6 @@ static void init_proc_7410(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
>
> @@ -4799,8 +4886,6 @@ static void init_proc_7440(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
>
> @@ -4901,8 +4986,6 @@ static void init_proc_7450(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
> /* Level 3 cache control */
> @@ -5025,8 +5108,6 @@ static void init_proc_7445(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
> /* LDSTCR */
> @@ -5156,8 +5237,6 @@ static void init_proc_7455(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
> /* Level 3 cache control */
> @@ -5289,8 +5368,6 @@ static void init_proc_7457(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
> /* Level 3 cache control */
> @@ -5442,8 +5519,6 @@ static void init_proc_e600(CPUPPCState *env)
> {
> register_ne_601_sprs(env);
> register_sdr1_sprs(env);
> - register_7xx_sprs(env);
> - /* 74xx specific SPR */
> register_74xx_sprs(env);
> vscr_init(env, 0x00010000);
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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