Split out do_exception and do_iic_irq to handle bulk of the interrupt and
exception processing. Parameterize the changes required to cpu state.
The status.EH bit, which protects some data against double-faults,
is only present with the MMU. Several exception cases did not check
for status.EH being set, as required.
The status.IH bit, which had been set by EXCP_IRQ, is exclusive to
the external interrupt controller, which we do not yet implement.
The internal interrupt controller, when the MMU is also present,
sets the status.EH bit.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/nios2/helper.c | 141 +++++++++++++-----------------------------
1 file changed, 44 insertions(+), 97 deletions(-)
diff --git a/target/nios2/helper.c b/target/nios2/helper.c
index eeff032379..6019e2443b 100644
--- a/target/nios2/helper.c
+++ b/target/nios2/helper.c
@@ -49,6 +49,42 @@ void nios2_cpu_record_sigsegv(CPUState *cs, vaddr addr,
#else /* !CONFIG_USER_ONLY */
+static void do_exception(Nios2CPU *cpu, uint32_t exception_addr, bool is_break)
+{
+ CPUNios2State *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
+ uint32_t old_status = env->ctrl[CR_STATUS];
+ uint32_t new_status = old_status;
+
+ if ((old_status & CR_STATUS_EH) == 0) {
+ int r_ea = R_EA, cr_es = CR_ESTATUS;
+
+ if (is_break) {
+ r_ea = R_BA;
+ cr_es = CR_BSTATUS;
+ }
+ env->ctrl[cr_es] = old_status;
+ env->regs[r_ea] = env->pc + 4;
+
+ if (cpu->mmu_present) {
+ new_status |= CR_STATUS_EH;
+ }
+ }
+
+ new_status &= ~(CR_STATUS_PIE | CR_STATUS_U);
+
+ env->ctrl[CR_STATUS] = new_status;
+ env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
+ CR_EXCEPTION, CAUSE,
+ cs->exception_index);
+ env->pc = exception_addr;
+}
+
+static void do_iic_irq(Nios2CPU *cpu)
+{
+ do_exception(cpu, cpu->exception_addr, false);
+}
+
void nios2_cpu_do_interrupt(CPUState *cs)
{
Nios2CPU *cpu = NIOS2_CPU(cs);
@@ -56,57 +92,20 @@ void nios2_cpu_do_interrupt(CPUState *cs)
switch (cs->exception_index) {
case EXCP_IRQ:
- assert(env->ctrl[CR_STATUS] & CR_STATUS_PIE);
-
qemu_log_mask(CPU_LOG_INT, "interrupt at pc=%x\n", env->pc);
-
- env->ctrl[CR_ESTATUS] = env->ctrl[CR_STATUS];
- env->ctrl[CR_STATUS] |= CR_STATUS_IH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
- env->regs[R_EA] = env->pc + 4;
- env->pc = cpu->exception_addr;
+ do_iic_irq(cpu);
break;
case EXCP_TLBD:
if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) {
qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=%x\n", env->pc);
-
- /* Fast TLB miss */
- /* Variation from the spec. Table 3-35 of the cpu reference shows
- * estatus not being changed for TLB miss but this appears to
- * be incorrect. */
- env->ctrl[CR_ESTATUS] = env->ctrl[CR_STATUS];
- env->ctrl[CR_STATUS] |= CR_STATUS_EH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
env->ctrl[CR_TLBMISC] &= ~CR_TLBMISC_DBL;
env->ctrl[CR_TLBMISC] |= CR_TLBMISC_WE;
-
- env->regs[R_EA] = env->pc + 4;
- env->pc = cpu->fast_tlb_miss_addr;
+ do_exception(cpu, cpu->fast_tlb_miss_addr, false);
} else {
qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=%x\n",
env->pc);
-
- /* Double TLB miss */
- env->ctrl[CR_STATUS] |= CR_STATUS_EH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
env->ctrl[CR_TLBMISC] |= CR_TLBMISC_DBL;
-
- env->pc = cpu->exception_addr;
+ do_exception(cpu, cpu->exception_addr, false);
}
break;
@@ -114,78 +113,28 @@ void nios2_cpu_do_interrupt(CPUState *cs)
case EXCP_TLBW:
case EXCP_TLBX:
qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=%x\n", env->pc);
-
- env->ctrl[CR_ESTATUS] = env->ctrl[CR_STATUS];
- env->ctrl[CR_STATUS] |= CR_STATUS_EH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) {
env->ctrl[CR_TLBMISC] |= CR_TLBMISC_WE;
}
-
- env->regs[R_EA] = env->pc + 4;
- env->pc = cpu->exception_addr;
+ do_exception(cpu, cpu->exception_addr, false);
break;
case EXCP_SUPERA:
case EXCP_SUPERI:
case EXCP_SUPERD:
qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=%x\n", env->pc);
-
- if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) {
- env->ctrl[CR_ESTATUS] = env->ctrl[CR_STATUS];
- env->regs[R_EA] = env->pc + 4;
- }
-
- env->ctrl[CR_STATUS] |= CR_STATUS_EH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
- env->pc = cpu->exception_addr;
+ do_exception(cpu, cpu->exception_addr, false);
break;
case EXCP_ILLEGAL:
case EXCP_TRAP:
qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=%x\n", env->pc);
-
- if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) {
- env->ctrl[CR_ESTATUS] = env->ctrl[CR_STATUS];
- env->regs[R_EA] = env->pc + 4;
- }
-
- env->ctrl[CR_STATUS] |= CR_STATUS_EH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
- env->pc = cpu->exception_addr;
+ do_exception(cpu, cpu->exception_addr, false);
break;
case EXCP_BREAK:
qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=%x\n", env->pc);
-
- if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) {
- env->ctrl[CR_BSTATUS] = env->ctrl[CR_STATUS];
- env->regs[R_BA] = env->pc + 4;
- }
-
- env->ctrl[CR_STATUS] |= CR_STATUS_EH;
- env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U);
-
- env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION],
- CR_EXCEPTION, CAUSE,
- cs->exception_index);
-
- env->pc = cpu->exception_addr;
+ do_exception(cpu, cpu->exception_addr, true);
break;
case EXCP_SEMIHOST:
@@ -195,9 +144,7 @@ void nios2_cpu_do_interrupt(CPUState *cs)
break;
default:
- cpu_abort(cs, "unhandled exception type=%d\n",
- cs->exception_index);
- break;
+ cpu_abort(cs, "unhandled exception type=%d\n", cs->exception_index);
}
}
--
2.25.1
