Am 27.11.2011 09:32, schrieb Avi Kivity: > On 11/25/2011 06:25 PM, Andreas Färber wrote: >> Am 24.11.2011 00:59, schrieb Andreas Färber: >>> Unlike PowerPC, an architecture that I'm trying to emulate does not >>> store branch instructions in the reset vector but a memory address. I'm >>> therefore trying to read physical address 0x00000 and store its value >>> into my env->pc. >>> >>> I've verified by running with -S that xp /xh 0x00000 shows the expected >>> value. >>> >>> When doing lduw_phys(0x00000) or cpu_read_physical_memory() in the CPU >>> reset function though, I just seem to read from uninitialized memory >>> (0xbaba). I've taken care to reorder CPU initialization to after the >>> BIOS file is loaded in the machine initialization function. >> >> Another weird memory issue is that tcg_gen_qemu_st16() succeeds but the >> value stored doesn't show up with xp or x on the monitor but 0x0000. >> >> MOVW 0xf8,#0xfee0 (at 0x02010) is trying to write 0xfee0 to 0xFFFf8. >> >> Similarly, a subsequent tcg_gen_qemu_ld16u() reads 0x0000 from there. >> >> TCG snippet: >> https://github.com/afaerber/qemu-rl78/commit/d3880bd53a26d224c56d16a6ea5950019d411cf0 >> >> uint8_t sfrp = ldub_code(s->pc + 1) & ~0x1; >> uint16_t data = lduw_code(s->pc + 2); >> LOG_DISAS("MOVW 0x%" PRIx8 ",#0x%04" PRIx16 "\n", sfrp, data); >> TCGv addr = tcg_const_tl(0xFFF00 | sfrp); >> TCGv_i32 val = tcg_const_i32(data); >> tcg_gen_qemu_st16(val, addr, 0); >> >> /* for testing: */ >> tcg_gen_qemu_ld16u(env_sp, addr, 0); >> >> tcg_temp_free(addr); >> tcg_temp_free(val); >> >> (qemu) info mtree >> memory >> 00000000-fffffffe (prio 0): system >> 00000000-0000ffff (prio 0): rl78g13_pb.code_flash >> 000fef00-000ffeff (prio 0): rl78g13_pb.ram >> 000ffee0-000ffeff (prio 0): rl78g13_pb.gpr >> 000fff00-000fffff (prio 0): rl78g13_pb.sfr >> >> https://github.com/afaerber/qemu-rl78/blob/d3880bd53a26d224c56d16a6ea5950019d411cf0/hw/rl78g13_pb.c#L88 >> >> memory_region_init_ram(sfr, NULL, "rl78g13_pb.sfr", 256); >> memory_region_add_subregion(get_system_memory(), 0xFFF00, sfr); >> >> Anything obvious that I'm missing? > > This region is a little special in that it is a subpage RAM region, so > it doesn't follow the normal paths where RAM is mapped directly to the > guest. Maybe there's some bug in that area.
Thanks a lot! You were right, setting TARGET_PAGE_BITS to 8 solves this issue. I'd still like to fix this subpage case for others' benefit. Do you have any pointer where I should set breakpoints / review code? > If the target is big > endian that could further complicate things. Target and host are Little Endian, target is 20 bits using TARGET_LONG_BITS 32. Andreas
