On 06/04/2022 09:52, Michael S. Tsirkin wrote:
On Mon, Mar 21, 2022 at 04:33:55PM +0100, Frederic Barrat wrote:
The powernv8/powernv9/powernv10 machines allocate a LSI for their root
port bridge, which is not the case on real hardware. The default root
port implementation in qemu requests a LSI. Since the powernv
implementation derives from it, that's where the LSI is coming
from. This series fixes it, so that the model matches the hardware.
However, the code in hw/pci to handle AER and hotplug events assume a
LSI is defined. It tends to assert/deassert a LSI if MSI or MSIX is
not enabled. Since we have hardware where that is not true, this patch
also fixes a few code paths to check if a LSI is configured before
trying to trigger it.
Hi Frederic, thanks for the patch!
I assume you will address Daniel's comments and post a new version,
right?
Yes, I will. I'm obviously only targeting 7.1
Fred
Frederic Barrat (2):
pcie: Don't try triggering a LSI when not defined
ppc/pnv: Remove LSI on the PCIE host bridge
hw/pci-host/pnv_phb3.c | 1 +
hw/pci-host/pnv_phb4.c | 1 +
hw/pci/pcie.c | 8 ++++++--
hw/pci/pcie_aer.c | 4 +++-
4 files changed, 11 insertions(+), 3 deletions(-)
--
2.35.1
