Hi Peter, Thank you for your comments. I'll submit a new patch. I am aware about architertural differences b/w v6m and v7m, but many of them is less relevant for the existing QEMU code (pririty bits for example).
Alex On Tue, 2011-12-13 at 18:05 +0000, Peter Maydell wrote: > On 13 December 2011 17:44, Alex Rozenman <alex_rozen...@mentor.com> wrote: > > Please review / discuss / push the attched patch. It adds initial support > > for V6-M for ARM and Cortex-M0. > > Please don't submit patches as attachments (see > http://wiki.qemu.org/Contribute/SubmitAPatch for other guidelines). > > This patch is pretty obviously missing a lot. It makes a start > on the instruction level differences, but v6M also has significant > differences in the memory mapped system registers, NVIC, etc, which > this patch doesn't try to deal with at all. There are also CPU model > differences like a smaller set of supported MRS/MSR system registers, > the M0 having no user/privileged distinction, etc. > > The v6M Architecture Reference Manual has an appendix on the v6M-to-v7M > differences, which is probably worth working through. > > -- PMM
