On Tue, 12 Jul 2022 11:01:18 +0100 Joao Martins <joao.m.mart...@oracle.com> wrote:
> On 7/12/22 10:06, Igor Mammedov wrote: > > On Mon, 11 Jul 2022 21:03:28 +0100 > > Joao Martins <joao.m.mart...@oracle.com> wrote: > > > >> On 7/11/22 16:31, Joao Martins wrote: > >>> On 7/11/22 15:52, Joao Martins wrote: > >>>> On 7/11/22 13:56, Igor Mammedov wrote: > >>>>> On Fri, 1 Jul 2022 17:10:13 +0100 > >>>>> Joao Martins <joao.m.mart...@oracle.com> wrote: [...] > I would really love to have v7.1.0 with this issue fixed but I am not very > confident it is going to make it :( it still can make into current release > > Meanwhile, let me know if you have thoughts on this one: > > https://lore.kernel.org/qemu-devel/1b2fa957-74f6-b5a9-3fc1-65c5d6830...@oracle.com/ > > I am going to assume that if no comments on the above that I'll keep things > as is. > > And also, whether I can retain your ack with Bernhard's suggestion here: > > https://lore.kernel.org/qemu-devel/0eefb382-4ac6-4335-ca61-035babb95...@oracle.com/ > > >> + hwaddr maxusedaddr = pc_pci_hole64_start() + pci_hole64_size; > >> + > >> + /* Bail out if max possible address does not cross HT range */ > >> + if (maxusedaddr >= AMD_HT_START) { > >> + pc_set_amd_above_4g_mem_start(pcms, maxusedaddr); > >> + } > >> + > >> + /* > >> + * Advertise the HT region if address space covers the reserved > >> + * region or if we relocate. > >> + */ > >> + if (x86ms->above_4g_mem_start == AMD_ABOVE_1TB_START || > >> + cpu->phys_bits >= 40) { > >> + e820_add_entry(AMD_HT_START, AMD_HT_SIZE, E820_RESERVED); > >> + } > >> + } > >> + > >> + /* > >> * Split single memory region and use aliases to address portions of > >> it, > >> * done for backwards compatibility with older qemus. > >> */ > >> > > >