On Mon, Jun 20, 2022 at 4:52 PM ~eopxd <eo...@git.sr.ht> wrote:
>
> From: Yueh-Ting (eop) Chen <eop.c...@sifive.com>
>
> Signed-off-by: eop Chen <eop.c...@sifive.com>
> Reviewed-by: Frank Chang <frank.ch...@sifive.com>
> Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/insn_trans/trans_rvv.c.inc | 1 +
> target/riscv/vector_helper.c | 7 +++++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
> b/target/riscv/insn_trans/trans_rvv.c.inc
> index 07d86551a9..83b85bb851 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -1901,6 +1901,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
> data = FIELD_DP32(data, VDATA, VM, a->vm); \
> data = FIELD_DP32(data, VDATA, LMUL, s->lmul); \
> data = FIELD_DP32(data, VDATA, VTA, s->vta); \
> + data = FIELD_DP32(data, VDATA, VMA, s->vma); \
> tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \
> vreg_ofs(s, a->rs1), \
> vreg_ofs(s, a->rs2), cpu_env, \
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 6be3c4e739..d1daa764b7 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -1298,10 +1298,13 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,
> \
> uint32_t esz = sizeof(TS1); \
> uint32_t total_elems = vext_get_total_elems(env, desc, esz); \
> uint32_t vta = vext_vta(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); \
> continue; \
> } \
> TS1 s1 = *((TS1 *)vs1 + HS1(i)); \
> @@ -1339,10 +1342,14 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong
> s1, \
> uint32_t total_elems = \
> vext_get_total_elems(env, desc, esz); \
> uint32_t vta = vext_vta(desc); \
> + uint32_t vma = vext_vma(desc); \
> uint32_t i; \
> \
> for (i = env->vstart; i < vl; i++) { \
> if (!vm && !vext_elem_mask(v0, i)) { \
> + /* set masked-off elements to 1s */ \
> + vext_set_elems_1s(vd, vma, i * esz, \
> + (i + 1) * esz); \
> continue; \
> } \
> TS2 s2 = *((TS2 *)vs2 + HS2(i)); \
> --
> 2.34.2
>
>
