On Tue, 26 Jul 2022 at 06:03, Richard Henderson <richard.hender...@linaro.org> wrote: > > Our probing of this SVE register was done within an incorrect > vCPU environment, so that the id register was always RAZ. > > Changes for v2: > * Include the commit text I forgot. > * Fix svm thinko. > > > r~
Applied to target-arm.next, thanks. -- PMM
