On Aug 2 12:03, Jinhao Fan wrote: > at 6:21 PM, Stefan Hajnoczi <stefa...@gmail.com> wrote: > > > What happens when the MSI-X vector is masked? > > > > I remember the VIRTIO code having masking support. I'm on my phone and > > can't check now, but I think it registers a temporary eventfd and buffers > > irqs while the vector is masked. > > Hi Stefan, > > While implementing interrupt masking support, I found it hard to test this > feature on the host. Keith told me that no NVMe drivers are currently using > this feature. Do you remember how you tested interrupt masking? >
You can probably do this with qtest. I don't see a helper for masking
the vectors, but qpci_msix_masked() should be usable as a base for just
changing that readl to a writel and mask it out.
This should allow you to do a relatively simple test case where you
1. bootstrap the device as simple as possible (forget about I/O
queues) - I *think* you just need to use guest_alloc for the admin
queue memory, use qpci_msix_enable() etc.
2. setup a simple admin command in the queue
3. mask the interrupt
4. ring the doorbell (a writel)
5. check that the vector remains in pending state
(qpci_msix_pending()).
This *could* be a potential way to do this.
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