Hi Dan,
Thanks for your reply!
On Mon, Aug 8, 2022 at 11:58 PM Dan Williams <dan.j.willi...@intel.com> wrote:
>
> What is the output of:
>
> cxl list -MDTu -d decoder0.0
>
> ...? It might be the case that mem1 cannot be mapped by decoder0.0, or
> at least not in the specified order, or that validation check is broken.
Command "cxl list -MDTu -d decoder0.0" output:
[
{
"memdevs":[
{
"memdev":"mem2",
"pmem_size":"256.00 MiB (268.44 MB)",
"ram_size":0,
"serial":"0",
"host":"0000:11:00.0"
},
{
"memdev":"mem1",
"pmem_size":"256.00 MiB (268.44 MB)",
"ram_size":0,
"serial":"0",
"host":"0000:10:00.0"
},
{
"memdev":"mem0",
"pmem_size":"256.00 MiB (268.44 MB)",
"ram_size":0,
"serial":"0",
"host":"0000:0f:00.0"
},
{
"memdev":"mem3",
"pmem_size":"256.00 MiB (268.44 MB)",
"ram_size":0,
"serial":"0",
"host":"0000:12:00.0"
}
]
},
{
"root decoders":[
{
"decoder":"decoder0.0",
"resource":"0x10000000000",
"size":"4.00 GiB (4.29 GB)",
"pmem_capable":true,
"volatile_capable":true,
"accelmem_capable":true,
"nr_targets":1,
"targets":[
{
"target":"ACPI0016:01",
"alias":"pci0000:0c",
"position":0,
"id":"0xc"
}
]
}
]
}
]
