The patch set add support for disassembling XVentanaCondOps instructions. And we can also extend it to disassemble the other custom extensions.
The target_info field in struct disassemble_info is intended to be used by targets in any way they deem suitable. We encode the custom extension in this field and decode the custom instructions according to this information. LIU Zhiwei (4): target/riscv: Use xl instead of mxl for disassemble disas/riscv: Move down the struct rv_decode disas/riscv: Add used_opcode_data field target/riscv: Support Ventana disassemble disas/riscv.c | 103 +++++++++++++++++++++++++++++++++--------- target/riscv/cpu.c | 22 ++++++++- target/riscv/custom.h | 25 ++++++++++ 3 files changed, 127 insertions(+), 23 deletions(-) create mode 100644 target/riscv/custom.h -- 2.25.1
