On Sat, Oct 1, 2022 at 3:04 AM Richard Henderson <richard.hender...@linaro.org> wrote: > > On 9/21/22 06:09, Paolo Bonzini wrote: > > On Tue, Sep 6, 2022 at 12:09 PM Richard Henderson > > <richard.hender...@linaro.org> wrote: > > > + gen_jcc1(s, b, l1); > > > + gen_jmp_rel(s, ot, 0, 1); > > > + gen_set_label(l1); > > > + gen_jmp_rel(s, ot, diff, 0); > > > > Might be worth a comment that jumps with 16-bit operand size truncate > > EIP even if the jump is not taken. > > Hmm. But is that correct? That's not reflected by the pseudocode for Jcc.
No, it's not: int main() { asm("clc; data16 jc 1f; 1:"); } does not crash (it does with stc) on real hardware, but it does with this series applied. So the various occurrences of gen_jmp_rel(s, ot, 0, 1) or gen_jmp_rel(s, MO_32, 0, 1) should stay as gen_jmp_tb(s, s->pc - s->cs_base, 1). Paolo