On 27/09/2022 19:14, Fabiano Rosas wrote:
Matheus Ferst <matheus.fe...@eldorado.org.br> writes:
Remove the following unused interrupts from the POWER8 interrupt masking
method:
- PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970, and POWER5p;
- Debug Interrupt: removed in Power ISA v2.07;
- Hypervisor Virtualization: introduced in Power ISA v3.0;
- Critical Input, Watchdog Timer, and Fixed Interval Timer: only defined
for embedded CPUs;
- Hypervisor Doorbell, Doorbell, and Critical Doorbell: processor does
We still need the first two.
0xe80 - Directed hypervisor doorbell
0xa00 - Directed privileged doorbell
It seems that on PowerISA v2.07, the category for msgsnd and msgclr
became "Embedded Processor Control" or "Book S." That's certainly not
what we are doing in code, both instructions are behind the PPC2_PRCNTL
flag, so they are not available for -cpu POWER8. Also, we're not
checking for ISA 3.00 on msgsync... I'll keep these interrupts in v3 and
send a separate patch fixing the instruction flags.
Thanks,
Matheus K. Ferst
Instituto de Pesquisas ELDORADO <http://www.eldorado.org.br/>
Analista de Software
Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>
