The architectural feature FEAT_EVT adds adds five new bits to the HCR_EL2 register: TTLBIS, TTLBOS, TICAB, TOCU and TID4. These allow the guest to enable trapping of various EL1 instructions to EL2. This patch series implements the feature and turns it on for the 'max' CPU.
Patch 1 is a bug fix where we forgot one of the existing trap bits when we added the new TLB maintenance operations for FEAT_TLBIOS and FEAT_TLBRANGE. thanks -- PMM Peter Maydell (7): target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB target/arm: Allow relevant HCR bits to be written for FEAT_EVT target/arm: Implement HCR_EL2.TTLBIS traps target/arm: Implement HCR_EL2.TTLBOS traps target/arm: Implement HCR_EL2.TICAB,TOCU traps target/arm: Implement HCR_EL2.TID4 traps target/arm: Report FEAT_EVT for TCG '-cpu max' docs/system/arm/emulation.rst | 1 + target/arm/cpu.h | 30 +++++++ target/arm/cpu64.c | 1 + target/arm/cpu_tcg.c | 1 + target/arm/helper.c | 144 ++++++++++++++++++++++------------ 5 files changed, 126 insertions(+), 51 deletions(-) -- 2.25.1
